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ERIC Number: ED078668
Record Type: Non-Journal
Publication Date: 1969-Aug
Pages: 53
Abstractor: N/A
ISBN: N/A
ISSN: N/A
EISSN: N/A
Available Date: N/A
Design, Study and Simulation of Space-Divided Output Buffer for PLATO.
Levine, Paula Naomi
This thesis describes the requirements for a buffer storage device, with respect to other system components and its own limitations, which is designed to aid in the economic transmission of processed data from a central computer to distant terminals. Proceeding from the fact that tariff rates on wide band educational television channels are attractive, but that the data format must be compatible with television images and must flow at a rate of 1200 bits per second (BPS), it deals with the major problem of converting sporadic bursts of computer output data into a serial rate of 1200 BPS through the utilization of a buffer storage device. An analytic study of input and output properties, a discussion of feasible assumptions, and descriptions of various models are presented, leading to suggestions for a suitable design of a buffer storage mechanism for the PLATO IV system. Actual data are employed in the determination of design alternatives. A brief outline of the PLATO system as it is currently conceived is also included. (Author/PB)
Publication Type: N/A
Education Level: N/A
Audience: N/A
Language: N/A
Sponsor: National Science Foundation, Washington, DC.; Office of Naval Research, Washington, DC.
Authoring Institution: Illinois Univ., Urbana. Computer-Based Education Research Lab.
Grant or Contract Numbers: N/A
Author Affiliations: N/A